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2004-05-17 Zenasis solution automatically creates fully laid-out standard cells
Zenasis has introduced ZenCell Factory, an automated library cell creation solution for standard cell-based design.
2016-02-22 UMC 28HPC POPs expands ARM 28nm IP portfolio
ARM has developed the ARM Artisan physical IP platform that includes standard cell libraries and memory compilers and POP technology for the 64bit ARM Cortex-A53 processor, and ARM Cortex-A7.
2007-06-07 TSMC channels 'Flow' to deal with 45nm design challenges
Foundry titan Taiwan Semiconductor Manufacturing Co. Ltd (TSMC) claims that its latest design methodology increases yields, lowers risks and improves design margins. Reference Flow 8.0 supports the company's 45nm process technology with advanced standard cell, standard I/O, and SRAM compiler.
2006-05-22 Synopsys to distribute TSMC 65nm Nexsys libraries
Synopsys was named by TSMC to distribute its 65nm Nexsys standard cell libraries, I/Os and memory compilers through Synopsys' DesignWare IP library.
2004-07-01 Startup automates library creation
Zenasis Technologies has developed a library design cockpit called ZenCell Factory that assists in creating standard-cell libraries.
2008-12-22 ST, Synopsys collaborate on 32nm components
Synopsys Inc. and STMicroelectronics NV have joined efforts to enable the readiness of key components in a 32nm design flow, including ST's standard cell library for low-power and high-performance design, and the support of the latest route rules in Synopsys' IC Compiler Zroute technology.
2004-10-12 PDF Solutions, Virage to add DFM to cell libraries
PDF Solutions Inc., a vendor of yield optimization software, is partnering with Virage Logic Corp. to create process-aware extensions to Virage's standard cell IP libraries, PDF said Wednesday (Oct. 6).
2001-04-23 Pad pieces
This application note discusses American Microsystems' "Pad Piece" methodology in gate array and standard cell libraries.
2001-04-23 On-chip pull-up/Pull-down resistors
This application note describes the importance of the on-chip pull-up and pull-down resistors in American Microsystems' gate array and standard cell libraries.
2003-07-25 Monterey Design receives patents on silicon prototyping, physical implementation
Monterey Design Systems has been issued two new U.S. patents entitled 'Method for Design Optimization Using Logical and Physical Information' and 'Method for Designing Large Standard-Cell Based ICs.'
2008-08-27 Low-cost implementation of digital oscilloscope in Nextreme structured ASIC
In the deep-submicron design era, it is clear that standard cell ASIC has become far too costly for most applications and its lengthening turnaround time is an additional drawback.
2005-06-15 IBM adopts ARM libraries for 65nm ASIC
ARM said that it's ARM Artisan Metro low-power standard cell libraries, memory compilers and I/Os have been selected for IBM's newest 65nm application-specific integrated circuit (ASIC) product.
2002-06-26 Hybrid architecture embeds Xilinx FPGA core into IBM ASICs
Undeterred by earlier false starts for programmable ASICs, IBM Corp. and Xilinx Inc. are embarking on a plan to jointly create an architecture that melds an FPGA core with a standard-cell ASIC methodology starting at the 90nm process technology node.
2006-08-16 High-performance delta-sigma ADCs ease converters' limitations
The integration of ADCs and CPUs has forced IC manufacturers to replace transistor-level design with VHDL code, synthesis and standard-cell libraries. This has resulted in lower-performance analog circuitry.
2012-03-29 Grasp the density requirements at 28 nm
Know how density has evolved from a back-end manufacturing issue that was of little interest to designers to a design concern that affects the layout of standard cell libraries.
2002-04-05 Fujitsu cell-based ASICs suit high-speed networking
Manufactured using the company's 0.115m CMOS process, the CS91 Standard Cell series from Fujitsu Microelectronics America supplies I/O options ranging from 622Mbps to 3.125Gbps, while operating at 0.8V to 3.6V voltage interface levels.
2006-12-13 Fujitsu adopts ARM's standard cells for 65nm platform
ARM's Velocity PHY for PCIe Gen-2 and the Advantage v2.0 standard cell library has been adopted by Fujitsu on its CS200 HP 65nm platform for advanced LSI development.
2005-09-09 Elan verifies embedded memories using Cadence's tools
Elan Microelectronics Corp. has validated its standard cell libraries and embedded memories using the Cadence Design Systems Inc.'s Encounter Conformal custom equivalence checking solution.
2013-06-14 DesignWare HPC Kit expanded for core optimisation
Synopsys' broad portfolio of DesignWare IP includes silicon-proven embedded memory compilers and standard cell libraries that support a range of foundries and processes from 180nm to 28nm.
2009-08-18 Custom-defined architecture lowers mask fees
Atmel Corp. has unveiled a custom architecture for 90nm SiliconCity ASIC development, providing up to 350,000 gates/mm2, offering customers gate densities in the range of a standard cell ASIC.
2005-06-10 Cadence's Encounter supporting Virage Logic's IPrima cell library
Cadence Design Systems Inc. and Virage Logic Corp. announced that Cadence's Encounter low-power digital IC design flow now supports power saving features of Virage's IPrima mobile semiconductor intellectual property (IP) platform's low-power standard cell library
2005-01-25 Altera bares industry's 'compelling structured ASIC solution'
Developed as an alternative to the standard cell, Altera's HardCopy II is a non-reprogrammable device seamlessly migrated from a Stratix II FPGA prototype.
2004-04-16 Zenasis device offers up to four-fold runtime speed increase
The new timing optimization product from Zenasis brings cell-based designers a three to four-fold increase in runtime speed.
2003-05-05 Xilinx FPGAs power Nauticus data center switches
Xilinx has announced that Nauticus Networks has chosen the Virtex- II Platform FPGA family for its recently launched N2000 Series of Intelligent Data Center Switches.
2008-09-05 X-Fab Sarawak all set to start 0.35?m process tech
X-Fab Silicon Foundries' Malaysian facility in Kuching, Sarawak, with its 200mm production line, now is fully qualified for volume production and second sourcing of the company's 0.35?m high-voltage process technology called XH035.
2007-12-17 Windows Embedded CE 6.0 BSP rolls for Atmel's AT91CAP9 kits
Atmel and Adeneo have announced the availability of a Microsoft Windows Embedded CE 6.0 BSP for Atmel's AT91CAP9A-STK Starter Kit and AT91CAP9A-DK Development Kit.
2012-06-06 VIS adopts Sagantec's process migration sol'n
According to Sagantec, the solution will enable VIS' library development to meet customer's tight prototyping schedule.
2006-09-13 Virtuoso becomes a 'native' OpenAccess application
Cadence is rolling out a new version of its Virtuoso custom design platform this week. The release offers a constraint-driven design flow and is built on top of the OpenAccess database.
2004-03-18 Virage to power Kawasaki's ASIC initiative
Kawasaki Microelectronics has partnered with Virage Logic Corp. in developing its Matrix ASIC strategic initiative.
2002-10-23 Virage to license logic IP
Virage Logic Corp. is making a full frontal assault into logic IP.
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