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2002-08-27 VeriSilicon platform optimized for SMIC CMOS process
VeriSilicon Microelectronics Co. Ltd has released the Standard Design Platform optimized specifically for Semiconductor Mfg Int. Corp.'s 0.185m CMOS process.
2015-02-12 Verilog-AMS vs SPICE view for power management
Verilog-AMS is a behavioural abstraction of the circuit that sacrifices accuracy for the sake of run time, while SPICE does exactly the opposite. Here's a comparative analysis from a power management perspective.
2003-02-18 Uncertainty clouds EDA industry outlook for '03
The electronic design automation industry faces an uncertain 2003, when annual sales could shrink 2 percent or grow as much as 10 percent, according to CEOs assembled for the EDA Consortium's CEO forecast panel.
2007-06-12 UMC, ARM team on 65nm SOI solutions
United Microelectronics Corp. and ARM announced that a test chip built with ARM silicon-on-insulator libraries was taped-out successfully on UMC's 65nm SOI process.
2006-06-27 UMC is getting 65nm interest
According to major silicon foundry United Microelectronics Corp., it has been getting a lot of interest in 65nm designs.
2008-03-17 Ultralow-dropout regulator guarantees 200mA output
An ultralow dropout regulator with a guaranteed 200mA output current has been launched by austriamicrosystems for space critical applications such as mobile phones and PDAs that require high performance despite limited PCB space.
2002-12-11 TSMC, Virage expand partnership
Taiwan Semiconductor Mfg Co. and Virage Logic have announced a distribution and support agreement that will provide designers with integrated library support and services for SoC design.
2007-06-28 TSMC, Cadence team on 65nm wireless design flow
Cadence and TSMC have teamed on nanometer wireless design and produced a new TSMC 65nm RF PDK compatible with the new Cadence Virtuoso custom design platform.
2010-07-22 TSMC, ARM agree on long-term collaboration
TSMC and ARM signed a long-term strategic agreement to achieve optimized Systems-On-Chip (SoCs).
2016-03-21 TSMC unveils silicon plans
TSMC will enable silicon interposers larger than 1,200mm21.5x the reticle sizeat 7nm to enable giant 2.5-D stacks of logic and memory for the next gen of Cowos- chip on wafer on substrate.
2005-02-07 TSMC libraries support Nexsys 90nm production
Taiwan Semiconductor Mfg Co. (TSMC) has unveiled a full suite of internally developed libraries that support its Nexsys 90nm technology.
2005-10-07 TSMC launches 65nm CyberShuttle service
Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) said Wednesday (Oct. 5) it has completed the first run of its 65nm CyberShuttle prototyping service carrying customer designs.
2015-09-21 TSMC heats up 10nm engine, preps 16nm for 2017
TSMC has gotten off to a slow start with its 16nm FinFET process and has also announced plans for specialty RRAM and MRAM memories that would act as alternatives to embedded flash.
2008-10-14 Trio collaborates to develop maskless ICs
Fujitsu Microelectronics Ltd and e-Shuttle Inc. have agreed to adopt D2S' advanced design for e-beam (DFEB) technology, starting with a 65nm low power (LP) library.
2004-07-26 Tower selects Artisan digital, mixed-signal IP platform
Tower Semiconductor and Artisan Components Inc. have signed a license agreement under which Artisan will develop and deliver its digital and mixed-signal IP platform for Tower's advanced 0.13?m CMOS process.
2007-09-03 Tips for successful structured ASIC designs
The use of structured ASIC for custom IC design is an increasingly attractive option. This article provides useful tips for structured ASIC designs.
2011-03-02 TI, MIT make 28nm DSP that scales from 1V to 0.6V
Texas Instruments and MIT has presented a 28nm mobile applications processor enabling lower power and extended battery life in mobile devices running advanced applications.
2006-02-27 TI upgrades Pyramid ASIC design kit
Texas Instruments announced the release of version 5 of the Pyramid ASIC design kit, targeting telecommunications, consumer and wireless infrastructure markets.
2012-07-26 Techniques, procedures for die bonding
Here's a look at various techniques for die bonding, a process of connecting die to the package for communication to the outside world.
2015-04-30 Taking advantage of TSMC's 28HPC process
Here are five areas where designers can take advantage of this new process with logic library technology to optimise the performance, power and area of their system on chips.
2010-05-14 Take a peek inside Apple's A4 processor
UBM TechInsights has analyzed the iPad and the A4 to establish some facts about the product and the processor.
2006-08-23 Taiwan's Unichip unveils SoC IP blocks
As design cycles for consumer electronics gear and communications devices quicken, Taiwan design services companies have been bolstering their IP offerings to round out basic SoC platforms into which clients plug a proprietary block.
2006-10-02 Taiwan design firms boost SoC IP offerings
As design cycles for consumer electronics gear and communications devices quicken, Taiwan design companies have been bolstering their IP offerings to round out basic SoC platforms into which clients plug a proprietary block.
2013-06-28 Synopsys, UMC team up to develop 14nm FinFET process
The collaborative tape-out of UMC's first process qualification vehicle uses Synopsys' DesignWare Logic Library IP portfolio and StarRC parasitic extraction solution.
2005-11-23 Synopsys, UMC partner on low power 90nm reference flow
EDA giant Synopsys Inc. and Taiwanese foundry United Microelectronics Corp. (UMC) Monday (Nov. 21) announced the availability of a 90nm reference design flow that is said to be optimized for low-power system-on-chip (SoC) designs.
2006-09-07 Synopsys, SMIC team on ref design flow 3.0
Synopsys Inc. and Semiconductor Manufacturing International Corp. announced that they have jointly developed and deployed reference design flow 3.0.
2006-03-03 Synopsys, IBM, Chartered, ARM collaborate on 90nm process
Synopsys announced that it has delivered an enhanced version of its RTL-to-GDSII low-power reference design flow for the latest 90nm process.
2010-06-16 Synopsys buys Virage Logic for $315M
Synopsys Inc. has signed a definitive agreement to acquire Virage Logic for $12 cash per Virage Logic share, resulting in a transaction value of approximately $315 million.
2002-10-04 Syncron: Web-based environment in PCB design
In the last 10 years, Taiwan has enjoyed steady growth in the semiconductor industry. Even with the current economic downturn, Taiwan continues to see the emergence of numerous (and diverse) fab-less semiconductor design companies. The IC designs coming from these businesses are taking advantage of the landmark achievements in semiconductor fabrication technology.
2004-06-16 SVM aids process selection
Silicon Virtual Machine offers guidance in determining the suitability of a process for a particular design.
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