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2005-02-28 Magma to prototype Enuclia's designs in FPGAs, ASICs
Magma's front-end design tools have been selected by Enuclia to prototype designs in FPGAs and structured ASICs, and then move them into to Enuclia's ASIC/COT design flow.
2003-06-17 Magma acquisition targets structured ASIC market
Magma Design Automation confirmed that it has purchased Los Angeles-based PLD synthesis company Aplus Design Technologies to enter the emerging structured ASIC market.
2005-09-15 LSI Logic to sell Gresham plant as it goes fables
Semiconductor supplier LSI Logic Corp. said it would sell its 8-inch wafer manufacturing plant in Gresham, Ore., as it continues to transition to a fabless manufacturing strategy.
2005-08-19 LSI Logic restructures business to focus on key markets
LSI Logic has reorganized its business to focus on the company's key markets of custom integrated circuits, consumer products, and storage platforms and products.
2004-07-13 LSI Logic processor core runs at 425MHz
Immediately available for cell-based ASIC apps, the new member of LSI Logic's portfolio of processor cores in Gflx 0.11?m technology runs at 425MHz.
2002-09-25 LSI Logic DSP core capable of superscalar functions
LSI Logic Corp. has rolled out its second generation of ZSP open-architecture superscalar DSP cores.
2006-02-02 LSI joins Synplicity's PIP program
LSI Logic and Synplicity announced that LSI has joined the Synplicity Partners in Prototyping program.
2001-03-01 Logic suppliers seek ways to embed FPGAs
Driven by the convergence of communications, computing and consumer applications, SoC design complexity increases the time required to bring competitive products to market, putting a premium on design speed and flexibility.
2001-03-01 Library generators employ optical correction at cell level
This technology article discusses the enhancement of cell-based designs with the evolution of EDA.
2003-05-12 Legend upgrades memory characterization tool
Legend Design Technology has added a new pushbutton ".lib" in-and-out front-end to its Char-Flow Memory embedded memory tool suite.
2006-09-18 Leakage takes priority at 65nm
As the first reports on 65nm design come in, the good news is that there seems to be no problems at 65nm that weren't present at 90nm. The bad news is that some of the problems that plagued 90nm get much worse at the new node.
2007-11-27 LDOs promise 'outstanding' noise performance
austriamicrosystems has expanded its LDO portfolio with the AS1358/59/61/62 family, which promises noise performance of less than 9?Vrms and up to 92dB PSRR (@1kHz typ).
2007-07-25 Jazz adopts Cadence RF, AMS design kits
Jazz has put its faith behind Cadence's RF and AMS design kits, offering its customers a more streamlined design cycle and faster time-to-market.
2002-08-08 Jazz adopts Artisan's design platform
Jazz Semiconductor has adopted Artisan Components Inc.'s design platform to support its mixed-signal, RF CMOS, and SiGe BiCMOS process technologies.
2000-12-01 Integrated approach for emerging tech designs
This technology article describes the integration of clock tree synthesis with logic synthesis, placement route and interconnect extraction to maximize the potentials of cell-based designs.
2010-03-16 IMEC, Altos join hands on design, prototyping service
IMEC and Altos Design Automation Inc. are partnering to set up a library re-characterization service based on Altos' ultrafast characterization tools.
2014-12-17 Imec unveils 8bit MPU using complementary TFTs
Imec, Holst Centre and Evonik used a hybrid technology incorporating two types of semiconductor metal-oxide for n-type TFTs and organic molecules for p-type TFTs in a CMOS circuit operating at 2.1kHz.
2012-10-17 Imagination Technologies prepping GPUs for 28nm
Imagination is working with EDA tool and library developers as well as foundries to help optimise the physical layout of its GPUs.
2007-06-01 IC designers favor less complex DFM
During the IEEE Electronic Design Process workshop, IC design experts point out that current approaches to design-for-manufacturing (DFM) may be yielding too little for the amount of effort and cost involved.
2008-11-12 IBM transits to 45nm SOI
With an objective to lead in an emerging technology, IBM's Microelectronics Group has launched what it claims as the industry's first 45nm, SOI foundry offering.
2005-06-24 IBM debuts ASICs at 65nm
Getting a jump on the leading-edge chip market, IBM rolled out a pair of 65nm application-specific integrated circuits, including a low-power offering for the wireless, mobile and consumer electronics markets.
2006-10-18 Hua Hong NEC, Synopsys team up for reference design
Synopsys and Hua Hong NEC announced their jointly developed Reference Design Flow 2.0 for Hua Hong NEC's 0.18?m process.
2013-04-11 How to accelerate memory characterisation
A new dynamic partitioning methodology addresses the limitations of existing approaches and enables the capacity and throughput requirements for characterisation of multi-million-bit memory cells.
2004-12-27 HHNEC selects Artisan IP solutions for 0.18?m process
Shanghai Hua Hong NEC Electronics Co. Ltd and Artisan Components Inc. have signed a license agreement under which Artisan will support HHNEC's advanced 0.18?m CMOS process.
2004-04-30 GDA IP cores based on RapidIO technology
The GRIO controller IP cores from GDA Technologies are fully compliant with the Serial and Parallel RapidIO specs.
2003-07-01 Fujitsu ASICs target telecom, industrial apps
Fujitsu Ltd has announced the release of the AccelArray structured ASICs that use standardized interconnect layers for basic system circuitry.
2006-06-29 Freescale ASICs power Hughes satellite broadband modems
Freescale Semiconductor will supply advanced satellite broadband ASIC solution to Hughes Network Systems, LLC.
2005-02-11 Free chip estimation tool debuts online
Giga Scale Integration has launched a free online version of InCyte, its chip estimation tool.
2014-04-22 FPGAs must shape up to accelerate growth
The rocketing ASIC mask-set and NRE costs have not yielded a surge of FPGA designs, but have rather driven engineers to resort to older technology nodes to mitigate the cost issues. Considering this and the standing Moore's Law concern, the FPGA outlook does not appear so bright.
2006-04-03 FPGAs consumed by power issues
Power issues charged up the recent FPGA 2006 symposium, and for good reasonmany observers see high power consumption as perhaps the biggest factor limiting wider usage of the devices.
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