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2003-07-16 Substrate noise can tax tools, methodologies
Raminderpal Singh, manager of Process Design Kit Development at IBM, says complex substrate-modeling, prediction methodologies and tools can all prove futile in IC design without understanding the "bigger" parasitic future.
2001-04-26 Modeling and application of bonding pads
This application note describes the algorithms used inside the modeling and the typical usages of bonding pads in the real circuit environment
2007-10-18 Industrial affiliation program tackles 32nm IC packaging
Two research centers are inviting industry partners to participate in an advanced research program on next-generation flip-chip and substrate technologies
2004-12-01 Getting inside the SiP
Design teams are taking a harder look at the SiP alternative to conventional SoC design as the advantages of combining multiple dice into one package have been well-documented.
2000-11-01 Extraction critical for RF design
Current CMOS technology is a viable candidate for portable communications devices. Modern deep-submicron MOS transistors have more than enough speed to handle high-frequency or RF signals.
2007-11-01 Formulating an EDA solution to ESI
The growing demand for cheap consumer wireless applications calls for unprecedented levels of integration. Among all the challenges to address ESI impact on analog and RF victims, modeling noise generation and injection is particularly tricky. The issue is to collect the power supply and substrate currents in both time and frequency domains.
2010-10-29 Fairchild adopts Magwel PTM tool
Fairchild Semiconductor said it has chosen Magwel's Power Transistor Modeling tool for design and verification of its high current power devices
2008-08-27 Cadence tool steps up IC package, SiP designs
The release of SPB 16.2, due in November of this year, from Cadence Design Systems, delivers advanced IC package/system-in-package miniaturization, design cycle reduction and DFM-driven design, along with a new power integrity modeling solution
2003-05-23 OEA upgrades spiral inductor synthesis
OEA Int'l Inc. is claiming a major upgrade for Spiral, a 3D toolset for synthesizing embedded spiral inductors in analog and RF chips, hybrids, multichip modules, and PCBs.
2002-05-01 VSIA releases SI spec for IP-block integration
VSIA has released the initial version of a signal integrity extension to the specs to help intellectual-property suppliers communicate signal integrity data to IP integrators.
2004-09-16 Unified data model brings signal integrity
Separate EDA environments and databases prevent analyzing signal integrity early in the design cycle, where it is most critical.
2002-06-21 Tomorrow's technology points to present-day solutions
Off-key subjects were at the heart of several emerging technology sessions at the DAC that examined the challenges of next-gen designs while suggesting possible approaches to existing problems.
2012-09-21 The golden age of simulation-driven design
Find out what it takes to design for reliability nowadays.
2011-04-27 Study improves stretchable interconnect reliability
IMEC has studied the deformation behavior and failure mechanisms of horseshoe-patterned interconnects, resulting to an improved reliability of the stretchable interconnects.
2008-09-09 Software simplifies metamaterial-based RF designs
A British government-backed project has led to the release of RF design tools for antennas and phase shifters that use metamaterials.
2005-07-18 SiP modules call for right blend of tech
The SiP solution offers a seemingly limitless combination of silicon, package and component technologies that simplify overall system design.
2005-09-08 RF ICs can be quite complex
According to one industry analyst, the worldwide handset RF semiconductor market is expected to grow from $5.3 billion in 2004 to $8.26 billion in 2008
2005-09-08 RF ICs can be quite complex
Understanding that complexity, and putting these devices to work for you, can help get you ahead of the competition
2011-10-19 Recent developments in 3D integration
Here's a discussion on through-silicon via and mechanically flexible interconnect, and how these are being currently developed.
2011-02-03 PCM progress report no. 1: Temperatures rise and constituents on the move
Here's a look at the overall picture of phase change memory progress.
2004-03-16 Passive integration activates wireless
The PiiP concept is a unique design approach for integrating package-level design into the silicon world via BiCMOS SiGe process.
2005-06-01 OEMs to EDA world: Time to catch up
If the EDA industry provides tools on time, it will continue to be a growing market, says Dataquest analyst.
2005-09-22 No scapegoats found for failed chip designs
Asked who shoulders the blame when nanometer IC designs don't work, panelists at the Custom Integrated Circuits Conference (CICC) here Tuesday evening (Sept. 20) agreed that designers, foundries, and EDA vendors all share the responsibility for ensuring success at advanced process geometries.
2007-01-16 New materials expand wireless options
Designers of portable wireless products now have new tools, approaches and components that provide fresh trade-offs in the quest for a perfect antenna. Newer antenna designs and components give designers other options
2011-12-29 Mobile investments more lucrative than PC in 2012
Canaccord Genuity expects to see continued strong sales of Apple's iPhone and iPad, despite the upcoming launch of a slew of competing tablets from competitors in 2012.
2005-04-18 Integrating high-speed transceivers in FPGAs
The benefits of less board space and increased flexibility make FPGAs with embedded transceivers an attractive solution to board designers.
2010-11-26 IEDM zooms in on energy saving
One keynote speaker will argue that the biggest potential for energy savings lies in the way we use our available energy, and that state-of-the-art power semiconductors and circuitry can help reduce losses along the entire electrical energy chain.
2012-09-28 How to select PCB materials for high-frequency apps
Find out how to simplify that choice when striving for the best tradeoff between ease of fabrication and best electrical performance.
2010-01-22 Fujitsu, A*STAR team on petascale computing
Supercomputers that are able undertake a quadrillion calculations per second will be used to solve challenging scientific and engineering problems.
2010-05-14 ESD physical integrity tool enables early prototyping
The PathFinder ESD integrity solution aims to enable designers to perform early prototyping, circuit optimization and full-chip signoff.
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