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What is an embedded system?
An embedded system refers to any electronic system that uses a CPU chip, but that is not a general-purpose workstation, desktop or laptop computer. Embedded systems generally use microprocessors, or sometimes custom-designed chips or both. It is used in various applications such as vehicles, machine tools and consumer electronics.
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2005-11-29 Upgraded SystemCrafter SC SystemC package now available
SystemCrafter and Orange Tree Technologies announced Version 2.0 of SystemCrafter's SC SystemC package. This new version has been developed to make managing and developing SystemC projects easier and simpler.
2008-06-02 Understand, test OCP SystemC channel models
The OCP Protocol is a high-performance and bus-independent interface protocol between intellectual property cores that provides a standard for Electronic System Level design. It improves IP core reusability, making more predictable and productive SoC designs.
2005-03-16 Transaction-based simulation using SystemC/SCV
Learn how SystemC/SCV speeds up simulation and verification cycles to provide overall project cycle with better quality results
2006-12-08 SystemC transaction-level standard released for review
Taking a step towards the interoperability of SystemC transaction-level models, the Open SystemC Initiative has released a draft SystemC Transaction-Level Modeling 2.0 kit for public review.
2004-04-02 SystemC tool adds top-down design
CoWare has added graphics-based front-end design software and other features to the System Designer tool of ConvergenSC.
2003-11-11 SystemC tool 'automates' ESL-to-RTL design flow
Offering technology that it claims will automate the ESL-to-RTL design flow, startup SpiraTech Ltd. has announced Cohesive, a toolset that bridges multiple levels of abstraction.
2005-01-20 SystemC synthesis under $2,000 debuts
Orange Tree Technologies and SystemCrafter have teamed to make SystemC synthesis more affordable for the masses.
2003-02-28 SystemC seen accelerating simulation
SystemC is seeing increasing use as a way of accelerating simulation, according to speakers at the DVCon Design and Verification Conference.
2001-04-01 SystemC revision drives toward synchronized system-level design
Synopsys and CoWare launches the SystemC to create a standardized dialect of C/C++ for both hardware and software design. SystemC provides a C/C++ class library that represents hardware concepts such as concurrency for designers to utilize.
2006-04-03 SystemC assertions go 'native'
Jeda Technologies shelved its own Jeda verification language in favor of a new tool suite supposedly equipped with the industry's first 'native' SystemC assertion-based verification automation capability.
2003-03-03 Summit tool beefs up SystemC
Summit Design Inc. launched its Visual Elite 3.1 which included FastC to better reach out to HDL designers.
2006-05-01 Summit Design offers 'personal edition' of SystemC IDE on Web
The Vista-PE, touting all the features of the full-fledged Vista IDE at the module level, hopes to help people bring up and explore SystemC.
2006-06-09 SoC tools promise seamless SystemC-to-RTL design flow
Sonics' latest SonicsMX Smart Interconnect and SonicsStudio promise a seamless SystemC-to-RTL design flow that provides consistent SystemC or RTL versions of specific SonicsMX configurations.
2001-05-16 Questions for SystemC
OSCI is supposed to be an "open" and independent standards effort, but Synopsys still has total control over the license agreement.
2003-09-11 OSCI group seeks IEEE nod for SystemC
The Open SystemC Initiative is looking to cement the language's legitimacy by submitting it to the IEEE for standards approval.
2003-09-02 New OSCI board strives for SystemC approval
The Open SystemC Initiative (OSCI) wants to cement itself as a viable language for large silicon platforms and SoCs.
2005-09-27 Modeling, design environment topples SystemC simulator limits
VisualSim SystemC Modeler from Mirabilis Design Inc. couples the OSCI-compliant SystemC v2.1 simulator to the core of the company's VisualSim simulation engine.
2004-04-20 Mentor links SystemC to emulation
Mentor Graphics has announced a "transaction based" interface between SystemC testbenches and its VStation emulators.
2005-12-14 IEEE approves SystemC standard
IEEE said it has approved the SystemC electronic design language standard. IEEE standardization may help bring SystemC into more widespread use and pave the way for further support from commercial EDA tools.
2006-10-16 ESL tool offers embedded software support in SystemC
Electronic system-level tools today aim primarily at hardware designers, but an upcoming SystemC architectural design tool expects to provide strong support for embedded-software development.
2005-09-01 Engineers write up SystemC TLM concepts
Engineers at STMicroelectronics claim that SystemC transaction-level modeling will be the next SoC design methodology.
2002-03-07 Doulos reveals training course for SystemC compiler users
Doulos, an independent methodology training company, has revealed a SystemC training course for users of Synopsys CoCentric SystemC compiler at the Design Automation & Test conference in Europe.
2004-11-09 CoWare upgrades SystemC-based SoC modeling tools
CoWare released a significant revision of its SystemC-based ConvergenSC SoC design tools.
2003-05-07 CoWare to unveil native SystemC tool
The company will release what it calls the first system-level verification tool built specifically for SystemC.
2013-05-02 CircuitSutra unveils SystemC for virtual platform dev't
SystemC model library from CircuitSutra promises to reduce virtual platform development cycle up to 80 per cent.
2007-02-23 C++ verification class library rolls for SystemC
Filling what it sees as missing capabilities in the SystemC verification environment, Jeda Technologies is introducing NSCv, a C++ verification class library for SystemC.
2003-11-24 ARM rolls out transaction-level SystemC models
ARM Ltd has announced the availability of the transaction-level SystemC models of its cores that are targeted for system-level verification.
2003-07-28 ARM releases AMBA AHB SystemC spec
ARM Ltd has announced the availability for download of the AMBA AHB Cycle-Level Modeling Specification.
2005-01-04 Aldec blends SystemC, HDL debugging
Aldec released Riviera 2004.12. New features include integrated SystemC and HDL debugging, assertion-based verification, and functional code coverage.
2004-06-03 Adveda modeler connects RTL, SystemC simulation
Adveda introduced a model generator simulation add-on that places a SystemC or PLI wrapper around RTL code so Adveda's fast models can be used with established top-down and bottom-up verification environments.
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