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2004-09-29 Xilinx tool suite targets system-level design
Xilinx introduced v6.3i of the Platform Studio for system-level embedded processing design on Xilinx Platform FPGAs.
2002-08-28 Xilinx overhauls FPGA software design package
A major upgrade of Xilinx Inc.'s Integrated Software Environment FPGA design tool package features new system-level design capabilities, improved performance, and new utilities to simplify FPGA design.
2005-07-27 WiMAX synthesizer modules from Sirenza streamline design
Sirenza announced the release of the first in a new family of phase-locked loop synthesizer modules, the PLL350-2444, targeting WiMAX (802.16-2004) infrastructure applications.
2010-05-14 Verification platform suits algorithm design, LSI testing
Xilinx K.K. and Hitachi Information & Communication Engineering Ltd have released the LogicBench system-level design verification platform that uses Xilinx Virtex-6 LX760 FPGA.
2005-01-31 Toshiba, Celoxica boost C-based SoC design
Combining electronic system level (ESL) design with a platform-based system-on-chip (SoC) solution, Toshiba Corp. and Celoxica Ltd announced Thursday (Jan. 27) a design flow for Toshiba's Media Embedded Processor (MeP) platform based on Celoxica's DK Design Suite of C-based synthesis tools.
2011-03-09 TI ADCs simplify system-level design
Texas Instruments' 16-bit ADS8363, 14-bit ADS7263 and 12-bit ADS7223 two-channel, SAR ADCs offer two independently controlled internal references, supporting speeds up to 1MSps.
2001-04-01 SystemC revision drives toward synchronized system-level design
Synopsys and CoWare launches the SystemC to create a standardized dialect of C/C++ for both hardware and software design. SystemC provides a C/C++ class library that represents hardware concepts such as concurrency for designers to utilize
2002-02-01 System-level reuse key to manageability
This article describes how system-level model reuse can help enhance designers' functional verification capabilities of DSP designs
2004-02-24 System-level design seeks traction
The move to system-level design, which is seen as critical as the industry moves to 90nm and lower, has been slowed by a lack of investment, doubts about any quick return on investment along with a shortage of systems designers and standards, U.S. experts said.
2000-11-01 System-level design brings new challenges
Embedded standard products reduce the overall design load on the system design engineer and allow the creation of complex designs in the shortest possible time
2004-10-05 System level design is here, Synopsys CTO says
System level design is happening now but it remains to be seen whether it will become EDA's next big thing.
2000-02-09 System level design considerations with SST CompactFlash card
The SST CompactFlash card offers a significant performance advantage over the existing CompactFlash solutions. The overall system performance can be greatly improved by optimizing the host design to take advantage of unique features of the SST CompactFlash card. This application note describes various system level design considerations for the SST CompactFlash card.
2004-12-15 System level design considerations when using I2C serial EEPROM devices
This app note discusses factors when using I2C serial EEPROM devices for both hardware and software.
2004-02-27 System design tool offers production release
Mirabilis Design has introduced the first commercial version of VisualSim, its system-level performance-modeling software.
2006-07-13 Summit Design launches IP interoperability initiative
Summit Design announced the launch of its Intellectual Property Initiative, which aims to address IP interoperability issues at the system level.
2007-02-01 Streamline body electronics system development with model-based design
Model-based design reduces time-to-market by ensuring throughout the design process that the control system meets requirements, and by enabling hardware validation as it becomes available through hardware-in-the-loop testing
2005-06-15 STMicro bares major breakthrough in SoC design
STMicroelectronics has revealed the publication of a book on chip design methodology
2006-03-17 Starter kit assists in FPGA design
Celoxica announced availability of its ESL starter kit, which combines the DK Design Suite of C-based design and synthesis tools, with an RC10 Xilinx FPGA development board
2005-08-24 Sanyo selects CoWare's LISATek for custom DSP design
Sanyo Electric Co. Ltd has purchased LISATek processor designer and processor generator software, as well as consulting services from CoWare Inc.
2004-10-08 Rohm design platform based on CoWare ConvergenSC
Rohm developed a platform named Real Platform based on CoWare's ConvergenSC, a System C-based SoC design environment for ESL design
2006-03-24 Renesas adopts ARM ESL design tools
ARM today announced that Renesas Technology is the latest ARM Partner to license the ARM RealView SoC Designer ESL solution.
2003-09-16 Register-transfer level design handoff is ready
Shrinking process nodes and tightened purse strings have made the venerable "gate-level design sign-off" unacceptable
2001-06-16 Real system-level design challenge: Hardware-firmware integration
For today's engineering co-design, the real system challenge is the hardware/firmware integration
2006-09-18 Re-thinking SoC design at 65nm, below
Executives from major IC houses and EDA companies have been talking about the design challenges facing developers as SoC designs move from 65- to 45- and 32nm
2005-12-29 On-chip subsystem startup adds Tokyo design center
On-chip subsystem provider IPextreme Inc. has opened a design center in Tokyo and named design and EDA veteran Kirk Saotome head of the company's Japanese operations
2003-09-26 New conference addresses system-level design
Two formerly independent research conferences will merge into one event scheduled for October 1-3, 2003.
2016-01-08 Mixed-signal IC design: Forecasts for 2016
This article will examine the key trends, challenges, and emerging solutions in mixed-signal system design enablement, focusing on mixed-signal verification
2005-12-15 Methodology kit addresses wireless design challenges
Cadence announced its RF Design Methodology Kit, which is designed to address key challenges in wireless design
2005-06-16 Methodology for DSP-based FPGA design
Here's a technique to solve productivity and design-quality issues that have previously plagued DSP developers
2008-12-31 Low-power design binds chips, software
There's a nagging awareness that every new gadget consumes more energy, adding to the carbon footprintand these footprints seem to be getting larger. It's high time we made system design more power efficient
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