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2008-06-13 Alchimer picks Lenix as Korea representative for TSV
Alchimer, a provider of nanometric films for through-silicon via (TSV) metallization, has appointed Lenix as its representative in Korea
2012-04-17 Addressing integration concerns with SiP technologies
Learn about the benefits and drawbacks of system-in-package technologies.
2013-10-31 SK Hynix turns to BeSang for 3D IC tech
SK Hynix has licensed BeSang's 3D IC process that uses a low-temperature process to build multi-layer 3D integrated circuits one layer at a time using traditional vias
2011-10-11 Price challenges hinder TSV adoption
In order for chip stacks using high density through-silicon vias (TSVs) to be used in high volume devices, major price adjustments should be done.
2009-04-01 Joint effort aims to enable 3D semiconductors
Applied Materials Inc. and Disco Corp. have announced a joint effort to develop wafer thinning processes for fabricating through-silicon vias (TSVs) in 3D semiconductors.
2015-04-07 Future of 3D SoCs: Adding unlimited layers sans TSVs
The future of three-dimensional (3D) very large scale integration (VLSI) for system-on-chips (SoCs) will not stack die connected by through-silicon-vias (TSVs), but will build them on a single layered die, according to Qualcomm.
2009-07-21 EVG, Applied ink 3D wafer bonding deal
EV Group (EVG) has partnered with Applied Materials Inc. to develop wafer bonding processes for the manufacture of through-silicon vias (TSVs) in 3D IC packaging applications.
2015-01-09 CEA-Leti describes true 3D monolithic integration
According to the research institute, the CoolCube technology no longer relies on tall through silicon vias (TSVs) and coarse redistribution layers typically used for wafer-on-wafer die stacking.
2008-10-31 Ziptronix heralds 3-D chip stacking technique
Ziptronix unveiled details of its patented Direct Bond Interconnect (DBI) technology, which employs a low-temperature process for 3-D chip stacking without thermal compression.
2011-02-07 X-Fab buys stake in MEMS Foundry Itzehoe
X-Fab and MFI will combine their foundry activities in the MEMS market.
2008-11-21 Wafer-level packaging achieves prominence
Wafer-level packaging, the fabrication of the IC package directly on the wafer, is finally getting exposure after many years of promises, according to an expert in the field.
2012-11-01 TSMC: Quad patterning likely alternative to EUV for 10nm
TSMC's chief technologist stated that quad patterning may be needed for 10nm process technology if extreme ultraviolet lithography is not available by 2015.
2013-09-20 TSMC unveils 16nm FinFET design flows, uses Cortex-A15 core
TSMC's design flows include one for the company's 16FinFET process, one customised for 16FinFET that offers transistor-level design and a 3D-IC flow for the design of vertically stacked structures.
2012-02-06 TSMC to roll 3D IC assembly service next year
The company has one year to get all physical design kits and EDA support in place to allow customers to design with COWOS, the technology standing for chip on wafer on substrate.
2010-04-19 TSMC tech event packs few surprises
Taiwan Semiconductor Manufacturing Co. Ltd presented a dizzying array of technology and new processes plus a few surprises at this year's Technology Symposium.
2011-12-15 TSMC pushes thru with 3D chip
The semicon firm claims its approach will be simpler, cheaper and more reliable, focusing on creating TSVs early in the process, then adding packaging capabilities to its fabs.
2014-04-25 TSMC fleshes out IC line-up with shrunk TSVs
Based on its work on chip stacks, TSMC will launch in July an enhanced version of the 16nm FinFET technology with up to 18 per cent faster data rates and lower leakage, in addition to a planned 10mm and 7mm processes.
2013-04-15 TSMC FinFET production set in 2013
Company executives detailed the new processes and how they aim to get there and also gave an update on 3D chip stacks and their on-going ramp of today's 28nm process node.
2011-04-08 TSMC chief tackles 7 points in keynote
Morris Chang discusses key points concerning TSMC and the industry, among them, the Japan quake's impact on the IC business, industry growth drivers, and TSMC's 28nm, 3D chip and 450mm efforts.
2015-07-08 Trends, challenges for EUV lithography
Imec said cutting costs per transistor at the next-generation, the 10nm node, will be tricky, and even more challenging will be getting extreme ultraviolet lithography ready to enable a full 7nm node.
2012-09-17 Toshiba opens MtM foundry to EU fabs
Toshiba has extended foundry and process development services to EU clients and expanded NAND flash memory production.
2009-07-09 Top 10 industry issues
Here are the top 10 looming issues that the semiconductor capital equipment industry is facing.
2012-06-15 TI describes 28nm CMOS TSV integration
A paper by TI researchers showed results indicating minimal effect on transistors within 4 microns of TSV placement.
2014-02-25 ThruChip opts for wireless wafer stacking
ThruChip develops Japanese professor's technology in stacking silicon wafers, using a wireless approach that is cheaper than TSVs.
2011-10-14 The move toward 3D chips
Semiconductor fabrication is moving toward 3D ICs and by next year, 3D chips will be available for commercialization.
2015-04-15 SRC to standardise 3D chip testing
Duke University lays down the plan to designing-for-test the TSVs, so that large inexpensive probes can touch many TSV microbumps simultaneously to take measurements that ensure defect-free stacked die.
2012-10-11 SPTS signs JDP with Fraunhofer for 300mm 3D IC Apps
The program will use 300mm APM plasma enhanced chemical vapor deposition modules installed on a Versalis platform alongside SPTS etch chambers in the ASSID centre in Germany.
2011-12-12 Sony CTO details next-gen chip requirements
Sony's Masaaki Tsuruta detailed at the International Electron Devices Meeting the requirements needed for next-generation gaming chips.
2011-04-26 Silicon integration key to lower-cost smartphones
To meet growing demand for lower-cost smartphones, most designers will integrate application and baseband processors, putting such integrated chips into nearly 70 percent of all smartphones by 2014.
2015-07-27 Semicon West highlights path towards 3D IC
The recent event underlined the significance of the move towards more advanced 3D IC technology, as well as the impact of the 'More than Moore' leading to this progress.
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