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2004-10-20	Forte Design division unveils interactive timing analysis Chronology, a Division of Forte Design Systems, has released its TimingDesigner v7.0, which is an interactive timing analysis and diagram product
2002-10-16	Flexible timing key to CCD design CCD's performance depend on timing generator, which produces a variety of clock pulses to determine how image is acquired and reconstructed
2006-11-07	Digital still camera runs on mixed-signal components Far from what the product category name might imply, the digital still camera is loaded with mixed-signal design and components
2008-09-01	Design tool shortens programming of mixed-signal devices Lattice has released the PAC-Designer software design tool suite ver 4.99a, which provides easy-to-use, point-and-click, intuitive design and verification support for all Power Manager and ispClock mixed signal devices
2000-12-01	Deep signal and design integrity assured in SoCs This technology news article describes the issues related to SoC designs and the corresponding solution to each.
2014-11-19	Configuring knock-sensor signal-conditioning system Engine knock is caused by improper ignition timing or faulty components. In this article, we will explain its basics and tackle how to set up a knock-sensor signal-conditioning system.
2012-09-27	Choosing the right timing device (Part 1 Learn about the key parameters affecting oscillator performance, including frequency, frequency stability, signal mode, jitter and reliability
2014-07-14	Calibration of gain, timing errors in ADCs Here's a look at a novel background calibration method for gain and timing mismatch errors through low complexity digital signal processing algorithms.
2011-12-28	Analyzing jitter, timing in the presence of crosstalk Here's a new approach to jitter separation in the presence of crosstalk, a growing problem as the number of lanes increases to boost computing system throughput.
2003-05-08	Analysis tool combines dynamic, static timing methods Nassda Corp.'s HANEX circuit-level timing and crosstalk analysis tool is targeted for use in digital designs of 130nm and below
2007-08-24	Analog video signal requirements: Similarities and differences (Part 5 This article will explore some of these analog video signal requirements and analog I/O design in these video systems, with a focus on power supply voltages and power dissipation
2007-08-10	Analog video signal requirements: Similarities and differences (Part 4 This article will explore some of these analog video signal requirements and analog I/O design in these video systems, with a focus on power supply voltages and power dissipation
2007-08-02	Analog video signal requirements: Similarities and differences (Part 3 This article explores some of these analog video signal requirements and how to simplify the analog I/O design in these video systems, focusing on the use of digital and analog filtering
2007-07-26	Analog video signal requirements: Similarities and differences (Part 2 Texas Instruments continues on the discussion of analog video signals by comparing and listing some of the requirements for video signals as a starting point for designers.
2004-11-05	Agilent spins mixed-signal scope dynamic probe for Xilinx FPGAs Agilent Technologies is debuting what it says is the industry's first FPGA dynamic probe application.
2002-05-17	ADI CCD signal processor can speed digital camera design Analog Devices Inc. says that its latest CCD signal processor allows designers of CCD-based digital still cameras to reduce camera size, lower parts costs and offer a variety of image resolutions
2004-12-20	Adding Timing Redundancy to Comm Equipment Designs In a typical telecommunication equipment design, all cards are synchronized to the same clock. Thus, a failure of this clock brings down the data traffic on all cards.
2002-03-01	Achieving successful timing closure designs This article details the design approach Morphics Technology utilizes to build a 5 million- to 15 million-gate chips for wireless signal processing that meets schedule, functionality and timing goals on first silicon.
2014-07-30	Accelerate ADAS dev't with radar signal analysis Radar allows fast and clear-cut measurement of the velocity and distance of multiple objects under any weather conditions, making it an enabling solution for automated driving.
2012-12-27	802.11ac power measurement and timing analysis Learn how a peak power analyser supports the unique 802.11ac power amplifier design and validation test requirements.
2012-06-29	32bit ARM Cortex MCUs tout cost-competitive digital signal control STMicroelectronics' STM32 F3 series of MCUs combine analog peripheral integration with a DSP- and FPU-enhanced core.
2006-09-07	Signoff quality' timing tool rolls for 65/45nm designs Cadence Design Systems introduced the Encounter Timing System, described as a "signoff-quality" timing product for nanometer SoC design
2005-05-02	Timing is right for real-time spectrum analysis Today's engineers need instruments that can trigger on unpredictable events, capture them seamlessly and analyze data that represents the passage of time
2013-04-26	Parallel FFT for multi-GHz FPGA signal processing Learn about the design of a parallel FFT with runtime-configurable transform length, with emphasis on the throughput and utilisation numbers that are achievable when using parallel FFT.
2002-03-16	Noise analysis catches hidden timing flaws This technical paper discusses how with shrinking process technologies, designers must cope with escalating crosstalk noise effects that impact high-speed SoCs prior to manufacturing.
2001-09-05	MX909A signal acquisition principles This application note provides guidance on the correct way of using the automatic level and timing extraction sequences of the MX909A modem chip
2002-10-15	FX909A signal acquisition principles This application note describes principles in the appropriate usage of the automatic level and timing extraction sequences of the FX909A as triggered by the AQLEV and AQBC bits of the command register
2005-06-16	Platform SoCs now possible To a large extent, platform SoCs have been science fiction--until now. Such designs can span a wide range of markets.
2003-10-01	A rebirth of IC compilation R. Goering rediscovers an old paradigm for designing sub-100nm ICs in an interview with Rajeev Madhavan, Magma Design Automation's CEO: silicon compilation.
2005-02-01	10x 'fast SPICE' speedup promised Nascentric vows to fill the gap in the 'fast SPICE' market left by Nassda acquisition.