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2008-08-07 Timing platform improves IP backhaul networks
Semtech has released the Timing Over Packet Synchronization ACS9510 device that enables IEEE1588v2 Precision Time Protocol to work closely with SONET/SDH synchronous equipment timing source solution, employing backhaul for broadband wireless base stations.
2002-11-26 Synchronization, timing put on one chip
The latest synchronization and timing solution from 9Co combines all of the timing-selection, phase lock, synthesis, and control functions in a single-chip device.
2010-05-10 Software tool eases timing solution customization
Cypress Semiconductor Corp. has released the CyClockWizard 1.0 free software tool for selection and customization of the company's programmable timing solutions
2011-05-19 Silicon Labs seeks market leadership via one-stop timing shop
Silicon Labs hopes to rule the timing chip domain by growing market share in all segments, becoming a one-stop-shop for timing and oscillator chips, and offering timing technologies unavailable elsewhere
2013-09-04 Micrel expands timing, MEMS line with Discera buy
Discera's PureSilicon oscillators and crystal-less clock generators boast significant benefits to timing customers including system-wide cost effective solutions, enhanced ruggedness and space savings
2014-10-30 MegaChips to acquire MEMS timing leader SiTime
The two companies announced on Tuesday, October 28, a definitive agreement under which Osaka-based MegaChips will acquire SiTime, a leader in the MEMS timing market for $200 million in cash
2007-04-09 Four-PLL spread-spectrum timing chip cuts EMI
Cypress Semiconductor introduced a four-PLL timing device with two spread-spectrum PLLs to reduce EMI
2007-11-29 Carrier-class FPGA-based network timing solution debuts
Xilinx Inc. and Brilliant Telecommunications Inc., a developer timing solutions, have partnered to deliver the industry's first carrier-class FPGA-based network timing solution for next generation wired and wireless networks.
2004-05-17 Zenasis solution automatically creates fully laid-out standard cells
Zenasis has introduced ZenCell Factory, an automated library cell creation solution for standard cell-based design
2008-02-19 XPhase chipset delivers AMD CPU power solution
IR has introduced the IR3514 and IR3507 XPhase chipset for AMD parallel and serial VID (PVID and SVID) processors.
2006-11-06 Xilinx unveils new design solution for Virtex-5 LXT
Xilinx announced the availability of a complete logic design solution including an update to its ISE design tools for their newest Virtex-5 LXT Platform FPGAs
2006-06-29 Xilinx delivers design solution for 65nm FPGAs
Xilinx has released the 8.2i Integrated Software Environment (ISE) design solution supporting the company's 65nm Virtex-5 FPGAs
2008-06-23 Understanding TI's PCB routing rule-based DDR timing specification
This application report motivates the way the DDR high-speed timing requirements are now going to be communicated to system designers. The traditional method of using data sheet parameters and simulation models is tedious
2004-12-16 Timing synchronization for 3G wireless
GPS forms the foundation of a reliable clock distribution in wireless networks.
2002-08-29 Timing modules offer end-to-end net solution
TeraSync Inc. has expanded its ATiMe timing product family to include the ATiMe-3S, for Stratum 3/3E, SEC or SMC timing and synchronization
2014-07-31 Timing IC integrates clock generators, jitter attenuators
The chips provide an I2C-configurable platform featuring a combination of frequency translation capabilities and
2006-07-06 Timing controller supports high-res TFT-LCD monitors
Solomon Systech has launched a TFT LCD timing controller that supports high-resolution SXGA and UXGA TFT-LCD monitors
2013-12-23 The lowdown on high-perf timing in board design
Know the various scenarios facing board designers when working with high-performance timing
2009-01-29 The bad stuff impacting DDR timing budgets and ways to avoid 'em
Why bother with a DDR "PHY" when some SSTL I/O's with potentially a DLL or PLL slapped together with glue logic will do the trick of interfacing to an SDRAM?
2006-11-22 Test solution rolls for Obsai base station interfaces
Elektrobit claims the first commercial test solution to provide comprehensive support for verifying the functionality and performance of Obsai RP3 and RP3-01 interfaces
2008-03-19 Test solution rolls for DDR2, DDR3 SDRAM
Tektronix has released a comprehensive test tool set for DDR2 and new DDR3 SDRAM technology, developed to deliver higher performance data rates.
2005-03-11 Synopsys unveils next-gen DFT synthesis solution
Synopsys announced DFT Compiler MAX, its next-gen DFT synthesis solution, offering 1-pass test data volume compression capabilities to address design and test challenges occurring in 130nm and smaller process technologies
2004-06-17 Synopsys low-power solution supports 90nm designs
During the DAC 2004, Synopsys announced that its Galaxy Power offers the industry's first comprehensive low-power solution for today's advanced, high-performance 90nm designs
2013-02-27 Symtavision adds timing analysis, design support to SymTA/S 3.3
The suite claims to feature enhanced timing analyses including support for FlexRay System Distribution, CAN-FD standard, buffer fill level analysis for COM and gateways, and Gantt chart customisation
2006-08-16 Statistical timing revs for 45nm era
Statistical-timing analysis may represent the next major technology shift in nanometer IC implementation, but it's going nowhere fast without statistical-timing models
2005-12-15 ST, SmardTech collaborate on smart card solution
STMicroelectronics announced an on-going collaboration with SmardTech to develop and deliver a highly efficient smart card solution, based on the ST19W secure MCU family and the SmardOS OS
2007-10-26 Solution tests PCIe, HDMI, DisplayPort compliance
Tektronix said its DPOJET software, used with its latest oscilloscopes, is the only solution with enough record length and sample rate on all channels to perform advanced measurements for PCIe, HDMI and DisplayPort compliance
2011-01-20 SoC design solution optimized for HKMG tech
Synopsys Inc. announced that it is delivering a low-power, high-performance SoC design solution optimized for the Common Platform alliance (CPA) 28nm high-k metal gate (HKMG) technology
2010-11-16 SoC design solution integrates Synopsys, SMIC technology
Synopsys Inc. and SMIC announced their delivery of a comprehensive solution for SoC design for the advanced 65-nm process. The solution integrates Synopsys' broad DesignWare interface and analog IP portfolio, plus other foundation IP with Synopsys' Galaxy Implementation Platform, in a tuned reference flow
2003-10-15 SMIC reference flow includes Magma IC solution
Magma Design Automation Inc. and Semiconductor Manufacturing International Corp. have released a validated reference flow.
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