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2008-06-06 Will 3D through-silicon vias break into mainstream?
The 3D technology based on through-silicon vias technology took center stage at the IEEE 2008 International Interconnect Technology Conference but there is still no consensus just how the industry will bring the long-awaited technology into the mainstream.
2000-12-04 Thermal & reliability study on high-current thermal vias & output pins
This application note addresses concerns raised with regard to pin and board heating when high currents are driven through thermally relieved plated through-hole (PTH) vias.
2004-10-01 Modeling, verification of backplane press-fit vias
Look at active and passive components of a system differently to push higher data rates through backplane channels.
2005-05-02 ZyCube duo has big plans for 3D circuits
Two executives from Zycube Co. Ltd lay the road map for significant trends in 3D technology.
2012-03-09 Wide I/O driving 3-D with TSV
Find out how wide I/O is leading the way to through-silicon vias-based heterogeneous die stacks.
2014-02-19 Tips for cost-effective 3D IC production
Know how to distribute the cost-of-ownership across the supply chain.
2015-07-22 Tearing down Hynix's high bandwidth memory
In this article, we explore the composition of Hynix's high bandwidth memory (HBM), which addresses bandwidth limitations with DDR4 type SDRAM and DDR5.
2011-07-07 TAITRA: TSMC, Intel to battle over 3D chips
TSMC is challenging Intel in the 3D arena as it plans to release 3D chips by the end of 2011.
2010-06-21 Sematech welcomes Qualcomm as first fabless member
Qualcomm Inc. has joined chip-making consortium Sematech to gain an edge in next-generation technology, reportedly including 3D chips.
2001-05-01 Selecting a microvia process
The article presents an overview of the current laser and mechanical microvia formation technology and proposes questions to help in determining which method is most suitable for a particular operation.
2015-08-14 Peek inside the first high bandwidth memory
In this teardown article, we reveal the innards of SK Hynix's high bandwidth memory, in AMD's Radeon 390X Fury X graphics card.
2015-02-02 Optimising BGA signal routing in PCB designs
BGA packaging technology for embedded designs is steadily advancing, but signal escape routing is difficult. Know the strategies to ensure that a product is correct in terms of form, fit and function.
2013-12-13 Latest developments in 3D IC technologies
Here's a look at the various forms of 3D IC technology, starting with the simpler incarnations and culminating in today's start-of-the-art implementations.
2009-10-19 ITRI, Applied Materials push 3D IC dev't
Applied and ITRI will work together as members of the Stacked-System and Application Consortium
2010-03-11 IMEC, Synopsys join hands on 3D stacked ICs
Synopsys Inc. and IMEC have partnered to accelerate the development of 3D stacked IC technologies.
2006-12-18 IBM tech quintuples heat dissipation power of chips
IBM Zurich Research Laboratory said it has found a way to double or even quintuple the capacity of chips for heat dissipation.
2007-06-01 IBM gets on the road to 3D packaging
News that IBM Corp. this year will sample its first commercial devices to make direct metal connections between chips marks a small but significant milestone on the road to 3D packaging.
2013-04-04 Globalfoundries delays 3D IC stack production
The company says it expects to use the 20nm process for 3D chips that may not ship in volume until 2015 or later.
2013-01-28 Fit in large-capacity memory in advanced-node SoCs
Using large-capacity SRAMs can dramatically reduce leakage and deliver higher system performance while keeping mask costs in check.
2013-12-30 Exploring monolithic 3D IC technologies
Learn about a relatively new approach that seems really promising: the Monolithic 3D IC technology.
2010-06-23 Elpida, PTI, UMC team on 3D IC integration for 28nm
Elpida Memory Inc., Powertech Technology Inc. (PTI), and United Microelectronics Corp. have reached a three-way cooperation to advance 3D IC integration technologies for advanced processes including 28nm.
2010-06-23 DAC panelists deliberate on 3D TSV roadmap
Panelists at the Design Automation Conference (DAC) made an attempt to forecast a roadmap for 3D through-silicon-vias interconnects.
2010-07-15 Applied boosts high-volume TSV manufacturing
Applied Materials Inc. announces the Applied Producer Avila system for high-volume manufacturing of stacked or 3D chips using through-silicon via (TSV) technology.
2008-12-04 Applied advocates TSV adoption
Applied Materials Inc. announced that it is leading a major effort to enable the widespread adoption of through-silicon vias (TSVs), a rapidly-emerging approach for vertically stacking ICs to boost chip performance and functionality in a smaller area.
2010-03-11 Alchimer establishes 300mm facility in South Korea
Alchimer S.A. has opened a new applications and development facility in Seoul, South Korea, for demonstration of its processes on 300mm wafers.
2014-10-29 Advances in power supply packaging
Here's a look at where the power industry is going in terms of component integration and thermal management. It also covers the developments in DC/DC power converter density.
2012-02-03 Advances in 3D-IC testing
Read about the design-for-3D-test architecture and implementation flow developed by researchers at Industrial Technology Research Institute based on the Synopsys test solution.
2014-06-05 Address SoC routing congestion with 2.5D SiP
The best of both worlds approach that the electronics industry has come up with to solve a design dilemma is the System in Package (SiP) in a 2D package.
2008-09-01 3D-TSVs spark packaging revolution
Chips face the so-called "More-than-Moore" 3D integration route in order to pursue the continued aggressive scaling demanded by the historical law. 3D integration with through-silicon vias (3D-TSV) will accelerate the consolidation happening in CMOS wafer fabs and the shift toward the fabless foundry model.
2010-06-18 3D TSV chips not ready for prime time
Some experts at the International Interconnect Technology Conference (IITC) concluded that 3D chips based on through-silicon-vias (TVS) are not ready for prime time.
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