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2002-05-17 Xilinx, Avnet rolls out Virtex-II, Spartan-IIE kits
Avnet Design Services and Xilinx Inc. have announced the availability of a development kit for Xilinx's Virtex-II FPGA and an evaluation kit for the Spartan-IIE.
2005-02-24 Xilinx Spartan-3 Virtex-II Pro FPGAs win designs in Mangrove
Xilinx Inc. disclosed that Mangrove Systems, a provider of metro and access network infrastructure, has selected Xilinx 90nm cost-optimized Spartan-3 and Virtex-II Pro FPGA devices for use in its latest Piranha and Barracuda MetroMPLS (Multiprotocol Label Switching) platforms.
2005-01-11 Xilinx rolls out first Virtex-4 device with PowerPC processor
Xilinx introduced its new FX12 FPGAs, which are the first Virtex-4 devices with embedded PowerPC processor
2004-06-25 Xilinx launches 200MHz QDR II SRAM memory tool kit
Xilinx developed a programmable 200MHz QDR II SRAM Memory Tool Kit that provides a comprehensive resource for system designers interfacing to QDR II SRAM devices
2005-06-08 Xilinx displays Virtex-II Pro FPGA based platform at SUPERCOMM
At the SUPERCOMM 2005 communications conference programmable logic provider Xilinx Inc. has demonstrated its 10Gbps enabled packet processing solution, developed with CorEdge Networks and Yamaichi Electronics
2002-04-04 Xilinx announces alternative solution to producing Virtex-II FPGAs
Xilinx Inc. has announced the availability of the Virtex-II EasyPath FPGA solution that provides an alternative to and reduces the cost of building Virtex-II FPGAs by up to 80 percent.
2002-06-28 Virtex-II Pro 3.3V PCI reference design
This application note describes the Virtex-II Pro 3.3V PCI solution.
2002-06-28 SONET rate conversion in Virtex-II Pro devices
This application note targets Virtex-II Pro designs that require the direct use of Rocket I/O transceivers in 16-bit mode.
2004-12-10 RocketIO X transceiver clock mode switcher for Virtex-II Pro X FPGAs
This app note demonstrates a way to switch clocking modes without knowledge of a PMA attribute bus interface.
2002-12-26 Reference design supports Virtex-II, CoolRunner-II
Xilinx Inc. has announced that its PicoBlaze 8-bit microcontroller reference design now includes support for the company's Virtex-II series of FPGAs and CoolRunner-II CPLDs, giving customers access to microcontroller solutions that utilize the company's complete range of programmable products.
2004-12-10 QDR II SRAM local clocking interface for Virtex-II Pro devices
This app note discusses a 200MHz four-word burst QDR II SRAM interface implemented in a Virtex-II Pro XC2VP20 FF1152 -6 device.
2002-07-25 Mentor Graphics, Xilinx to develop solutions for Virtex-II Pro FPGAs
Xilinx Inc. and Mentor Graphics Corp. have agreed to develop a customized extension of the Seamless co-verification environment, using the Virtex-II Pro FPGAs.
2002-07-10 Memec, Xilinx offer development kit for Virtex-II Pro devices
Memec Design and Xilinx Inc. have announced the availability of Virtex-II Pro development kit.
2008-07-25 Managing power in FPGAs and other devices using CoolRunner-II CPLDs
This application note demonstrates how multiple devices, including Virtex-II and Spartan-3 FPGAs, can be effectively power managed by a single CoolRunner-II CPLD. It is written with battery-powered applications in mind.
2002-06-03 Luminous selects Xilinx Virtex-II Pro FPGAs for MAN solutions
Optical networking solutions provider Luminous Networks, has selected Xilinx Inc.'s Virtex-II Pro FPGAs for its PacketWave family of MAN access switches.
2004-04-30 Lucent chooses Xilinx Virtex-II Pro for optical translator unit
Lucent Technologies has selected Xilinx Inc.'s FPGAs for its new 10Gbps tunable optical translator unit, a key component in one of its DWDM-based metro optical equipment offerings.
2002-08-01 Endeavor delivers co-simulation solution for Virtex-II Pro
Endeavor Intertech Corp.'s CoSimple hardware/software co-simulating solution targets Xilinx's Virtex-II Pro FPGAs with the IBM PowerPC 405 processor core.
2004-12-09 DDR SDRAM DIMM interface for Virtex-II devices
This app note discusses the DDR SDRAM dual in-line memory module (DIMM) controller.
2004-12-10 Creating high-speed memory interfaces with Virtex-II and Virtex-II Pro FPGAs
This app note discusses the challenges with various techniques to overcome key concepts in implementing any memory interface.
2005-08-24 Core plants fast serial data link on Virtex-II Pro FPGAs
VMETRO introduced a serial FPDP core that targets Xilinx's Virtex-II Pro FPGAs used in apps that include signal processing, high-speed data recording, real-time imaging and test systems that rely on the FPDP interface.
2002-06-28 Connecting Virtex-II devices to a 3.3V/5V PCI bus
This application note describes how to connect Virtex-II and Virtex-II Pro devices to a 3.3V or 5V PCI bus.
2002-07-12 Atrenta, Xilinx enhance software for Virtex FPGA analysis
Atrenta Inc. and Xilinx Inc. have disclosed the added capabilities and Virtex-specific rules for Atrenta's SpyGlass software
2007-08-03 Virtex-5 FPGAS are interoperable with 800Mbps DDR3
Xilinx Inc. claims that its Virtex-5 FPGA devices are now interoperable with 800Mbps DDR3 SDRAM devices from leading memory suppliers
2007-07-10 Virtex-5 FPGA powers rugged embedded computing devices
Nallatech has announced the development of its new Xilinx Virtex-5 based rugged embedded computing family
2008-12-25 Virtex-5 FPGA core drives XMC I/O module
Innovative Integration has announced the X5-TX, an XMC I/O module featuring four channels of 500MSps, 16bit DAC outputs driven by a Virtex-5 FPGA computing core, DRAM and SRAM memory, and eight lane PCIe host interface
2007-01-26 Virtex-4-based devt platform speeds embedded system designs
Xilinx has announced immediate availability of the Pb-free, RoHS-compliant ML410 development platform based on the Virtex-4 FX60 FPGA
2010-12-14 Use RLDRAM II memory interface for FPGA
Learn how to use a Virtex-5 device to interface to Common I/ Double Data Rate Reduced Latency DRAM devices
2010-12-15 Use QDR II SRAM interface for FPGA
Read about the implementation and timing details of a Quad Data Rate SRAM interface for Virtex-5 devices
2007-03-12 Synthesizable CIO DDR RLDRAM II controller for Virtex-4 FPGAs
This application note describes how to use a Virtex-4 device to interface to Common I/O (CIO) Double Data Rate (DDR) Reduced Latency DRAM (RLDRAM II) devices. The reference design targets two CIO DDR RLDRAM II devices at a clock rate of 200/235MHz with data transfers at 400/470Mbps per pin.
2008-05-22 Storage solution designed for Virtex-5 FPGAs
Xilinx has announced a flash-based configuration and storage solution for the Virtex-5 family that delivers new levels of configuration performance for meeting today's high-speed connectivity requirements
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