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2004-10-21 MediaTek adopts EverCAD's ADiT-VPI tool
MediaTek and EverCAD announced that the latter's ADiT-VPI has been certified and adopted as the standard tool in the SoC chipset design flow of MediaTek.
2004-02-02 Synopsys, Cadence give nod to SystemVerilog changes
Enhancements based on feedbacks from vendors and users spotlighting some shortcomings in the current ver 3.1, will be implemented in SystemVerilog 3.1a.
2004-04-20 Mentor links SystemC to emulation
Mentor Graphics has announced a "transaction based" interface between SystemC testbenches and its VStation emulators.
2004-04-12 SynaptiCAD joins graphical debugging market
Offering a graphical debugging system that can control Verilog, VHDL, and C++ simulators, SynaptiCAD has announced BugHunter Pro.
2005-03-01 Scalable load testing targets multi-service RF network gear
Tektronix's new LTS21, priced between about $300,000 and $1.5 million, shapes us as a configurable load test system.
2005-10-13 Protocol analyzer helps deploy triple-play UMTS services
Tektronix is rolling out a new generation Universal Mobile Telecommunications System UTRAN (UMTS Terrestrial Radio Access Network) protocol analyzer.
2004-08-09 EverCAD platform suits mixed-signal SoC design
EverCAD released several tools required in SoC designs, as well as a verification platform suite that promises to eliminate the bottlenecks in mixed-signal SoC designs.
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