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2013-04-01 Suite targets automated wafer-level parameter testing
Keithley has enhanced its Automated Characterisation Suite (ACS) software that enables automated wafer-level testing of high power semiconductor devices like power MOSFETs, IGBTs, BJTs and diodes.
2010-09-17 Verigy bags SEMI's 1st advanced testing innovation award
Verigy, has won Semiconductor Equipment and Materials International's (SEMI) first Advanced Testing Innovation Award
2014-12-17 Packaging and testing industry trends from 2013 to 2014
In 2014, the output value of OSAT industry is seen to grow by 8.4 per cent and the advanced packaging industry is expected to increase by 10 per cent.
2006-04-10 MEMS tester works at wafer level
Tokyo Electron has delivered the Temeon, a new wafer-level microelectromechanical system tester to a MEMS device manufacturer located in Japan
2007-07-24 Keithley, French lab enter nanotech testing pact
Keithley has agreed to jointly develop advanced nanotechnology and chip materials testing technology with France's CEA Leti Laboratory
2014-06-05 Agilent, Cascade simplify wafer-level RFIC testing
The alliance aims to combine Cascade's probe stations with Agilent's measurement and analysis software to provide tools that deliver differentiated RF wafer-level measurements
2007-12-17 Chip-on-MEMS' enables wafer-level calibration
A new technique called "chip-on-MEMS" bonds ASIC dice atop an entire MEMS wafer before dicing, according to developer VTI Technologies.
2011-04-11 TSMC enters chip-packaging arena
TSMC will soon open a bumping facility and offer silicon interposers and TSV technologies for 3D chips, but will remain focused on the foundry market and will not compete against subcontractors.
2004-04-22 TEL test handler supports WLCSP, KGD technologies
Tokyo Electron has developed the WDF DP test handler that supports the WLCSP and KGD packaging and test technologies.
2003-04-10 SUSS MicroTec, LNL collaborate on wafer optical probing solution
SUSS MicroTec AG and LNL Technologies have agreed to jointly commercialize LNL's optical probe technology.
2006-03-16 Rx: New test techniques
New measurement approaches require faster and more efficient and reliable instrumentation and software.
2008-05-01 Partition and package to miniaturize handsets
Designers are turning to system-in-package, 3D IC stacking and wafer-level packaging to enable the acute miniaturization found in handsets, particularly for RF functions
2005-10-25 O2Micro to open China facility
O2Micro International Ltd has announced plans to set up an IC test facility in China. The testing center, which will be ready by 2006, will perform final electrical and wafer level electrical testing for analog and mixed signal products.
2008-01-16 Keithley updates ACS test software
Keithley Instruments' updated Automated Characterization Suite V3.2 software enhances the powerful automation capabilities of ACS integrated test systems.
2014-11-12 GQFN package shrinks devices by up to 60%
Aside from reducing package size, the grid array flat no-lead package also enables improved electrical performance through lower inductance and capacitance.
2003-09-25 Giga Solution services adopted by GCT
Taiwan-based Giga Solution Tech. Co. Ltd has provided GCT Semiconductor with wafer-level testing services on CMOS RFIC which is applied to WLANs.
2013-11-22 Novel dielectric material to enhance eWLB packages
Nanium released an improved dielectric material and process solution for its fan-out wafer-level packaging (FOWLP) technology, embedded wafer-level ball grid array (eWLB
2009-10-14 Flash driver offers two switching frequency options
Maxim Integrated Products is offering the MAX8834, a 1.5A white-LED (WLED) flash driver IC in a tiny, 5mm x 5mm wafer-level package (WLP
2005-06-14 Aehr Test rolls out new wafer tester
Aehr Test's new FOX-1 full wafer contact test and burn-in system is focused on testing an entire wafer of devices with a single touchdown or for short-duration burn-in and test
2006-01-27 ST's Bozotti plays down Philips merger option
ST's CEO has played down the possibility of a merger with, or takeover of, Philips Semiconductors, raising the lack of geographic complementarity as an issue.
2012-06-21 NEC, Advantest team up to develop RFID test sol'n
The collaboration between Hua Hong NEC and Advantest aims to improve RFID test standards by increasing number of RFID parallel sites being tested.
2001-04-15 Multichip DRAMs serve graphics apps
No technology can last forever. So the question arises: how long can multichip package solutions last in the diverse and rapidly changing graphics market?
2014-01-29 Cost-efficient 3D IC wafer processing without adhesives
AML showcased a unique solution to get rid of the adhesive and to allow for a vacuum to be created between the carrier and the wafer to be processed in 3D IC production.
2014-09-05 China plots global chip domination
A group of Chinese investors, which include a state-owned firm, offered a buyout proposal to U.S. digital imaging chipmaker OmniVisiona move that will allow China instant access to the global market.
2005-03-18 Wafer tester monitors RF chip quality in realtime
Keithley Instruments is now introducing a third-generation on-wafer RF measurement capability with some very promising features that address the conundrum.
2008-01-14 Wafer probe stations cut cost in 45nm node
Cascade Microtech has launched the next step in 300mm wafer probe stations designed to meet the need for advanced on-wafer measurements for semiconductor devices.
2008-04-30 TSMC IC design collaboration strategy stirs controversy
TSMC has unveiled a new and possibly controversial strategy that involves more collaboration in the early stages of the IC design process.
2003-09-15 Toshiba deploys Keithley IC test system
Toshiba Corp. has selected Keithley Instruments' S630DC/RF parametric test system to support production of its new generation of semiconductors.
2006-07-03 Tokyo Electron unveils probe mark analyzer
Tokyo Electron has released a new probing accuracy diagnosis system that is integrated with the company's 300mm fully automatic wafer prober.
2011-07-12 Test system targets 3D, 28nm node ICs
Verigy has released a new generation of test systems for advanced semiconductor designs, including 3D device architecture and IC designs for 28nm technology node and beyond.
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