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Imec showcases next-gen devices to supersede silicon 2015-12-14
Imec's R&D programme on advanced logic scaling is targeting the latest and mounting challenges for performance, power, cost and density scaling for future process technologies. ?
More info on FinFET ReRAM unveiled 2015-10-26
A full paper is due to be presented on a 1Kb memory array of devices using a 16nm logic FinFET manufacturing process at this year's IEDM coming up in December. ?
Tunnel FETs operate at 0.4V using CMOS 2015-10-12
Foundry SMIC manufactured the complementary TFETs that show potential for ultra low power applications such as the Internet of Things as a result of its low voltage operation. ?
Using 16nm FinFET as a resistive memory device 2015-10-05
An IEDM paper is set to demonstrate that hafnium-dioxide high-k dielectric material, which is used in the high-k metal gate (HKMG) of a 16nm FinFET, can also be turned into a ReRAM device. ?
What's inside 1Xnm planar NAND? 2015-06-23
Double patterning has become mandatory for making the 16nm node NAND flash and the memory makers use a self-aligned double patterning for the active, control gate, floating gate and bitline patterning. ?
Analyst predicts Intel's 10nm plans 2015-04-23
According to a forecast by David Kanter, Intel will use quantum well FETs starting with its 10nm process that will use two new materials, InGaAs for n-type transistors and strained Ge for p-type devices. ?
Is resistive RAM the next NVM star? 2015-04-22
Resistive RAM features low power consumption and a small cell areaboth compelling reasons for their adoption as a non-volatile memory. ?
Micron, Intel tout 3D NAND flash chips 2015-03-27
Micron and Intel developed their own 3D NAND flash chips, which will sell as chips and in solid-state drives. It will pack 256Gbits into vertical NAND chips using MLC and 384Gbits in TLC versions. ?
Intel recommends 2.5D, 3D integration for next-gen chips 2015-03-06
Intel emphasised that heterogeneous integration enabled by 3D IC is essential to the development of future SoCs, especially in terms of scaling lithography processes. ?
Dark Silicon: Looking to monolithic 3D for ray of light 2015-02-09
According to an ARM executive, dark silicon is projected to account for "about one-third of total area in the 20nm technology node, increasing to as much as 80 per cent by the 5nm node." ?
CEA-Leti describes true 3D monolithic integration 2015-01-09
According to the research institute, the CoolCube technology no longer relies on tall through silicon vias (TSVs) and coarse redistribution layers typically used for wafer-on-wafer die stacking. ?
IBM claims PCM non-volatility not necessary 2014-12-19
Ron Neale gets down to the nitty-gritty of IBM's invited paper at IEDM 2014. IBM has stated that for PCM, non-volatility/data-retention is no longer needed. ?
What's hot at IEDM 2014? 2014-12-18
The 2014 International Electron Devices Meeting proved that Moore's Law is still alive. The event was a victory lap for Intel, which gave more details on the 14nm finFET process. ?
IBM fab sale: Retracing its x86 steps 2014-06-27
IBM's focus on servers for businesses prevented it from seeing and responding to what one former employee calls "the biggest server buying spree in a decade." ?
Qualcomm advocates monolithic 3D adoption 2014-06-18
The chipmaker appears to be making a concentrated effort to employ 3D integration technology to stretch out the semiconductor roadmap beyond the scaling trajectory predicted by Moore's Law. ?
Six hot tech trends emerge in high-speed memory 2014-04-10
While DDR4 comes first to mind in consideration of the latest developments in high-speed memory, several others including embedded DRAM and SRAM cells make the top six list. ?
28nm node at the final frontier of Moore's Law 2014-03-20
Zvi Or-Bach of MonolithIC 3D emphasises the need to recognise that 28nm is actually the last node of Moore's Law and that dimensional scaling is no longer the path for cost scaling. ?
Monolithic 3D ICs gain momentum 2013-12-18
A number of companies have, in one way or another, started to take leverage in the monolithic 3D IC space and designated the technology as an alternative to dimensional scaling. ?
Moore's Law may not be a dead end after all 2013-12-17
Henry Samueli, co-founder of Broadcom, said that on a positive note, the looming certainty of Moore's Law could push companies such as Broadcom to be more clever about design possibilities. ?
Recognizing the issues with phase change memory 2013-12-11
There are about half a dozen papers on phase change memory (PCM) devices at IEDM 2013, and most deal with known reliability problems associated with PCM. ?
Globalfoundries consider SSRW tech as 3rd option 2012-12-20
The chip foundry is evaluating a third manufacturing option to follow conventional bulk planar CMOS based on a super-steep retrograde well approach. ?
Panel: No single approach in future of ICs 2012-12-17
A group of experts at IEDM debated about the various technologies in semiconductor miniaturisation, with FinFETs being just one of many approaches. ?
Imec advances UHF Schottky diode, 10nm FinFETs 2012-12-14
Imec presented a ultra-high frequency Schottky diode based on amorphous IGZO as semiconductor and announced its collaboration with Synopsys for 10nm FinFETs. ?
IBM showcases 3D server chip stacks 2012-12-14
IBM has showcased its techniques for stacking 45nm processors at IEDM. The company's techniques could give the processors significant performance and power gains. ?
Study: InGaAs alternative to silicon at 22nm 2012-12-13
MIT researchers claim their indium gallium arsenide transistors can challenge silicon at 22nm. ?
Toshiba says MRAM future of mobile processors 2012-12-13
The STT-MRAM structure has the lowest power consumption yet reported and is about one-tenth that of prior reported prototypes. ?
Intel tweaks 22nm tri-gate SoC for ultra-low leakage 2012-12-12
Intel goes into the nitty-gritty of the latest modification to its 22nm tri-gate (FinFET) SoC technology. ?
Endurance of flash memory boosted to 100M cycles 2012-12-11
Macronix International is set to present a paper on boosting the cycling endurance of flash memory through thermal annealing at the upcoming International Electron Devices Meeting. ?
ReRAM in 28nm logic process piques TSMC's interest 2012-09-28
A research team from National Tsing-Hua University found that a contact RRAM (CRRAM) cell has been realised in a HKMG 28-nm CMOS logic process without the use of any additional masking or process steps. ?
Sony CTO details next-gen chip requirements 2011-12-12
Sony's Masaaki Tsuruta detailed at the International Electron Devices Meeting the requirements needed for next-generation gaming chips. ?


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