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HMC, HBM gain wider appeal for computing networking apps 2015-12-01
An expert said that while HMC and HBM products are rolling out along with DDR4, it's clear there's room for all three technologies to find market share as standards take time to settle into place. ?
MEMS devices come in 300mm-diameter wafers 2015-09-30
CEA-Leti manufactured accelerometer MEMS devices on 300mm-diameter wafers using its piezo-resistive silicon nanowire technology. ?
China investment holding firm buys Swedish MEMS foundry 2015-09-30
GAE acquired Silex Microsystems for an undisclosed amount and has begun the construction of a wafer fab in Beijing to expand the company's production capacity. ?
CoolCube 3D interconnect targets FinFET process 2015-08-05
The research institute demonstrated the feasibility of CoolCube used to stack FinFET layers on its 300mm production line as well as with fully-depleted silicon-on-insulator manufacturing processes. ?
A closer look inside SK Hynix's 1st high bandwidth memory 2015-07-28
SK Hynix's HBM has a 1,024-wide bus. It employs a base logic die as an interface between the four DRAM die stack and an interposer that supports both the HBM modules and the AMD GPU. ?
Semicon West highlights path towards 3D IC 2015-07-27
The recent event underlined the significance of the move towards more advanced 3D IC technology, as well as the impact of the 'More than Moore' leading to this progress. ?
MEMS innovation to spur IoT growth 2015-06-05
The ramp of new MEMS designs to volume production may take too long and cost too much to meet IoT market expectations, unless the industry figures out ways to accelerate MEMS development. ?
Qualcomm to bring Monolithic 3D IC tech to smartphones 2015-04-21
According to a Qualcomm executive, the company is looking to leverage Monolithic 3D IC technology to win market share in the $8 billion smartphone market. ?
Moore's law heads toward uncertain future 2015-04-21
Although Moore's law has guided the electronics industry, it has begun to fail in many aspects, the most pronounced being clock speed that has been pegged at 3GHz max since about 2004. ?
SRC to standardise 3D chip testing 2015-04-15
Duke University lays down the plan to designing-for-test the TSVs, so that large inexpensive probes can touch many TSV microbumps simultaneously to take measurements that ensure defect-free stacked die. ?
Intel recommends 2.5D, 3D integration for next-gen chips 2015-03-06
Intel emphasised that heterogeneous integration enabled by 3D IC is essential to the development of future SoCs, especially in terms of scaling lithography processes. ?
SMIC, Cista boast 8MP CIS prod'n on 0.13?m BSI 2015-03-03
According to the companies, back-side illumination CMOS image sensor technology boosts the amount of light captured by the sensor, thus enabling image sensors with better low-light performance. ?
Fan-out wafer level packaging to reach $200 million, analysts say 2015-02-26
Market researchers predict in a new report that the Fan-Out Wafer Level Packaging (FOWLP) market is likely to reach an estimated $200 million in 2015, expects 30 per cent CAGR in the following years. ?
CEA-Leti describes true 3D monolithic integration 2015-01-09
According to the research institute, the CoolCube technology no longer relies on tall through silicon vias (TSVs) and coarse redistribution layers typically used for wafer-on-wafer die stacking. ?
Packaging and testing industry trends from 2013 to 2014 2014-12-17
In 2014, the output value of OSAT industry is seen to grow by 8.4 per cent and the advanced packaging industry is expected to increase by 10 per cent. ?
3D IC adoption crucial to the entire TSV roadmap 2014-12-12
Yole Developpement forecasted that the adoption of 3D IC technology, due to its many advantages, as well as its ability to enable heterogeneous integration, is being considered for many applications. ?
End of DDR marks surge of 3D, TSV-based memory 2014-12-04
Several DRAM memory architectures based on 3D layer stacking and TSV have evolved to accommodate increasing memory requirements spearheaded by Samsung, Hynix and Micron. ?
Samsung delivers 8Gbit 20nm DDR4 chips for servers 2014-10-22
Beyond the 32GB modules, the new 8Gb chips will allow production of server modules with a maximum capacity of 128GB by applying 3D through silicon via (TSV) technology ?
Data centres to gain from expanding DDR4 portfolio 2014-09-11
DDR4 is definitely more an enterprise server play, and it's not likely it will turn up in mainstream notebooks in its early days, said Gordon Patrick, director of marketing at Micron Technology. ?
MEMS startup focuses on Chinese ODMs for growth 2014-07-01
Ben Lee, CEO of mCube, said it secured $37 million of Series C venture capital to enter phase three of its progress, and will target Chinese ODMs, not a design win from either Apple or Samsung. ?
3D integration tech thins down 300mm wafer to 4?m 2014-06-23
The length of the wiring between upper- and lower-layer chips in the thinned wafers is reduced to below 1/10 compared to conventional TSVs, with wiring resistance, capacitance, and volume being reduced drastically. ?
CEO of China's SMIC talks about global expansion 2014-04-01
EE Times correspondent Junko Yoshida sat down with SMIC CEO Tzu-Yin Chiu in a one-on-one interview that revealed the company's interest to expand globally. ?
Chip stacks feature near-zero TSV keep-out zones 2014-03-20
GlobalFoundries describes a middle-of-line layer stack technique that uses nitride, PMD oxide, and a contact protection layer with a high coefficient of thermal expansion. ?
Consortium releases HMC specification update 2014-03-13
HMCC's update acknowledges existing industry nomenclature by migrating the associated channel model from SR to VSR, while the USR definition also increases performance from 10Gb/s up to 15Gb/s. ?
ThruChip opts for wireless wafer stacking 2014-02-25
ThruChip develops Japanese professor's technology in stacking silicon wafers, using a wireless approach that is cheaper than TSVs. ?
3D TSV Summit underscores cost-effective production 2014-02-06
From a maker's perspective, 3D IC production will only ramp up if the added costs for implementing TSVs and all the ensuing steps can be largely compensated by the IC performance benefits. ?
Cost-efficient 3D IC wafer processing without adhesives 2014-01-29
AML showcased a unique solution to get rid of the adhesive and to allow for a vacuum to be created between the carrier and the wafer to be processed in 3D IC production. ?
Monolithic 3D ICs gain momentum 2013-12-18
A number of companies have, in one way or another, started to take leverage in the monolithic 3D IC space and designated the technology as an alternative to dimensional scaling. ?
SMIC opens R&D, manufacturing facility for 3D ICs 2013-10-23
By rolling out a centre dedicated to vision, sensors, and 3D IC, SMIC is hoping to let the world know of its ability to extend its manufacturing and R&D capabilities. ?
TU Delft, Imec co-author test flow for 3D IC optimisation 2013-10-11
3D-COSTAR aims to optimise the test flow of 3D stacked ICs by compiling the yields and costs of design, manufacturing packaging and logistics. ?


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