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TSMC makes deeper cut in capital spending 2001-05-16
This news article describes how TSMC is cutting down on capital costs to accommodate its other fab operations. ?
Taking advantage of TSMC's 28HPC process 2015-04-30
Here are five areas where designers can take advantage of this new process with logic library technology to optimise the performance, power and area of their system on chips. ?
Silicon prototyping verifies IP functions 2001-06-01
SoC designers are confronting several important tasks in optimizing next-generation products. New systematic approaches are needed to ensure that IP can be transferred from one process geometry to the next. ?
Long road ahead for analog synthesis 2000-05-01
It may be a bit like asking why can't women be more like men, but the question, "Why can't analog be more like digital?" is the most common complaint among engineers attempting to use analog design tools. Synthesis (the automatic generation of physical circuitry from a high-level language description) is one area where analog design departs drastically from digital. ?
Examining metal eFuses 2015-11-16
Here is a look at two electrically blown fuse structures (eFuse) used in metal gate logic processes. The first eFuse structure that we look at is made by Intel and the second by TSMC. ?
'Design-with-test' for low-power devices 2007-01-16
A new methodology called design with test in which tools are deeply integrated and power consumption is highly considered during testing will be key in ensuring the continued success of low-power products. ?
Web-based EDA tools come to Asia 2000-09-01
We can shop for clothing and record albums over the Internet; we can order food, and even have love affairs! Why not design ICs? This was the underlying theme at the recently concluded Design Automation Conference (DAC 2000) in Los Angeles. Look, for example, at the thinking process harnessed by Barcelona Design Systems. ?
Tips for cost-effective 3D IC production 2014-02-19
Know how to distribute the cost-of-ownership across the supply chain. ?
The iPhone 5 inside out 2012-09-27
Apple's iPhone 5 A1428 model, torn apart for a closer inspection ?
The future of mixed-signal design 2000-02-01
I hear two contradictory things regarding mixed-signal IC design. One set of voices says the systems-on-chip (SoC) of the future will be large mixed-signal systems, and the proportion of these being built will double from about 33 percent currently to 66 percent by 2005. The other set of voices says everything will be big digital chips constructed in ever-deeper submicron CMOS, in that the ASICs of the future will use as many 15 million logic gates, but that the analog and mixed-signal circuitry will be left off-chip. ?
The endless pursuit of smaller packages 2016-03-15
In this article, we explore the creativity in semiconductor package integration, while anticipating the release of the Samsung's Galaxy S7 and the iPhone 7. ?
Taiwan's design foundries thriving despite downturn 2001-06-16
A design house merely designs an IC; a design foundry provides total solutions from embedded IPs to complex tasks of time-to-market SoC design, production and testing services. ?
Taiwan takes stocks 2001-04-15
Salaries in Taiwan are low compared to those in the United States, which is why some companies are providing Taiwanese engineers with stock options to get them stay. ?
Process design kits take aim at custom ICs 2001-04-15
This technical article describes Cadence Design Systems' process design kits for 0.25?m and 0.18?m process simulations. ?
Peek inside the first high bandwidth memory 2015-08-14
In this teardown article, we reveal the innards of SK Hynix's high bandwidth memory, in AMD's Radeon 390X Fury X graphics card. ?
Peek inside iPhone 4S 2011-10-25
Here's an image gallery of what can be found inside the iPhone 4s. ?
Issues in using 3rd party IP in ASIC/SoC design 2013-03-15
Know some of the common challenges in integrating and using 3rd party IPs in today's high-end ASIC/SoCs. ?
iPhone 6 Plus teardown: Lots of hardware in small space 2014-09-22
The new iPhone 6 Plus has a host of new technologies packed in a relatively bigger package, including Apple's A8 SoC with 64bit architecture, an easily removable battery and a fingerprint cable that no longer rips off when the case is opened. ?
IoT drives chip packaging innovation 2015-03-09
The need for high performance multi-functional devices in a single package is pushing the industry to innovate in multi-chip packaging. This high level of integration has presented huge challenge. ?
Fitting last year's IP to today's processes 2001-06-01
Changing design styles in IP reuse should prompt engineers to be more receptive to future design shifts in the industry. ?
Exploring Samsung's 14 nm LPE FinFET 2016-02-03
Samsung has been gearing up for the launch of its 14 nm Low Power Plus (LPP) process used in the Exynos 8 SoC. In this article, we look into the changes we should expect. ?
Exploring circuit design in FinFET technology 2014-03-07
Know some of the things that could affect the learning and cost curve with regard to the use of FinFET. ?
Examining the sparse matrix problem 2014-01-08
The semiconductor ecosystem itself is transitioning towards an increasingly complex yet transparent Internet, making it harder for upstart companies to get into the microprocessor business. ?
Bluetooth chipmaker will ride 802.11a wave 2001-04-15
This technical article describes Cambridge Silicon Radio's move to develop an all-CMOS 802.11a chip for 54MHz wireless networking in the 5GHz band. ?
Are smartphones getting too hot? 2015-08-05
Premium smartphones require a delicate balance between performance and battery life. With increases in performance, are phones getting too hot? ?
Apple taps Samsung 28nm HKMG process for A7 2014-01-24
Chipworks' Sinjin Dixon-Warren dissects the front end of line transistor structure used in the A7, with comparison to advanced technologies used by both Apple and other vendors. ?
Address challenges in 40G/100G SerDes design, implementation 2011-11-17
Read about the various aspects of SerDes design such as transmit/receive portions. ?
A9: Story of Apple's design ambitions 2015-11-13
The A9 is really a story within a story. On a basic level it is a story of a sixth generation AP that is fabricated in a FinFET process. It is also a bigger story of Apple semiconductor design ambitions. ?
A tech walkthrough of metal gate I/O transistors 2016-01-19
The input/output (I/O) transistor is the workhorse of the metal gate CMOS transistors, yet noone really talks about it. In this article, we'll see why it is worth a look. ?
A primer on 3D-IC design challenges 2011-09-27
Know the 3D-IC design challenges such as system exploration, floorplanning, analysis, and design for test (DFT), and learn how designs will evolve as 3D-IC goes on to become a necessity for managing power, performance, form factor, and cost goals. ?


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